In this era of explosive AI chip performance growth, only TSMC can surpass TSMC! To break through the size limitations of traditional packaging, TSMC has recently introduced CoPoS (Chip-on-Panel-on-Substrate), a panel-level advanced packaging technology, which is expected to enter mass production by 2028.

How does this innovative CoPoS technology differ from the current mainstream CoWoS? What high-specification semiconductor tape materials are required during the critical glass substrate processing? This article provides a comprehensive analysis for you.

1. CoPoS vs. CoWoS: Two Core Evolutions in Advanced Packaging

The fundamental shift from CoWoS to CoPoS lies in "utilization of surface area by shape" and "innovation in interposer materials." The core technical comparisons between the two are as follows:

Utmost Area Utilization Driven by Rectangular Panels

Traditional CoWoS uses a 12-inch circular wafer as the interposer base, which generates a significant amount of edge scrap when arranging square or rectangular chips. In contrast, CoPoS adopts a rectangular panel-level packaging, boosting area utilization from roughly 65% to over 95%. This perfectly addresses the capacity and cost bottlenecks of ultra-large AI chips.

 "Glass Substrates" Emerge as the New Target for Interposers

To accommodate the demand for ultra-large area packaging, CoPoS is no longer confined to expensive silicon interposers that face size limits. Instead, it is shifting toward glass substrates or high-performance organic board materials. Glass features excellent flatness, low dielectric loss, and superior dimensional scalability, making it the most eye-catching key material in the CoPoS structure.

2. Key to Glass Substrate Processing: High-Transparency PET Carrier and Protective Tapes

In the precision manufacturing of glass substrates and TGV (Through-Glass Via), material stability is of paramount importance. When applying tapes to these processes, highly transparent PET carrier materials are generally preferred, serving three core processing stages:

Temporary Protection: Prevents the glass surface from scratches and contamination during handling or processing.

Carrier & Securing: Provides rigid, stable support during grinding, wafer thinning, or transportation.

Precision Alignment & Dicing: Leverages high-transparency characteristics to ensure precise optical alignment during laser or mechanical dicing.

3. Solar Plus Company Provides One-Stop Semiconductor UV Tape Solutions

To meet the glass processing challenges of next-generation CoPoS packaging, Solar Plus Company has leveraged its profound R&D capabilities in adhesion technology to launch a series of high-specification tape products customized for semiconductors and advanced packaging:

UV Release Tape: Delivers robust adhesion during processing, which quickly drops upon UV irradiation, allowing easy peeling without leaving any adhesive residue.

UV Dicing Tape: Tailored for high-precision wafer and glass dicing, effectively preventing die-fly or edge chipping.

Double-Sided UV Tape: Provides a highly efficient solution with dual-sided UV-curable release properties, ideal for complex multi-layer manufacturing processes.

Double-Sided Hybrid Tape (One Side UV Release / One Side PSA): Features an innovative structure where one side offers permanent fixation or flexible adjustments via Pressure Sensitive Adhesive (PSA), while the other side delivers UV release properties to satisfy various temporary bonding and transfer requirements.

"Customized Configurations" Supporting Cutting-Edge Process Development

Solar Plus Company deeply understands the complexity of advanced packaging processes. Our semiconductor tape technology offers fully customizable adjustments for adhesive thickness, film thickness, and specialized multi-layer structures. Whether you are in the R&D stage or moving towards mass production deployment, we are fully equipped to help you seamlessly master the most forward-looking CoPoS glass substrate processing.

Contact Solar Plus Company today to get more technical information regarding semiconductor advanced packaging tapes and to request samples for testing.